VN16218 Datasheet, PDF (2/11 Pages) Vaishali Semiconductor – 2.5 Gigabit SERDES Transceiver

VN16218
Figure 1. Functional Block Diagram
T[0:19]
TBC/REF
(125 MHz)
Input Latch
Advance Information
D+
Parallel
TX+
to
Line
Serial D-
Driver
TX-
Converter
PLL Clock
Multiply X 20
R[0:19]
RCLK (125MHz)
Comma Detect
Serial
to
Parallel
Converter
Clock
Recovery
RX+
Mux 4:2
RX-
Equalizer
Loopback Enable
Figure 2. Pin Configuration
VDDT
TX0
TX10
TX1
TX11
TX2
VSS
TX12
TX3
TX13
TX4
TX14
VDD
TX5
TX15
TX6
TX16
TX7
TX17
TX8
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
60
2
59
3
58
4
57
5
56
6
55
7
54
8
53
9
52
10
51
11
50
12
49
13
48
14
47
15
46
16
45
17
44
18
43
19
42
20
41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
VSS
RX2
RX12
RX3
RX13
RX4
RX14
VDD
RX5
RX15
RX6
RX16
RX7
RX17
VDD
RX8
RX18
RX9
RX19
VSS
2001-11-09
Page 2
MDSN-0003-00
www.vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax [phone]