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| CD4066 Datasheet, PDF (6/8 Pages) Unisonic Technologies – QUAD BILATERAL SWITCH | |||
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CD4066
CMOS IC
 SPECIAL CONSIDERATION
Using continuously under heavy loads may cause UTC CD4066 to decrease in the reliability even if the operating
conditions are within the absolute maximum ratings and the operating ranges.
In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability
should exceed VDD/RL. This provision avoids any permanent current flow or clamp action of the VDD supply when
power is applied or removed from UTC CD4066.
 AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
VDD
VCON=VDD
VIS
VDD
CONTROL
OUT/IN
IN/OUT
VSS
CL
50pF
VOS
RL
200kΩ
VDD
VIS
0V
VDD
VOS
0V
tr
90%
50%
10%
tPLH
50%
tf
tPHL
Fig. 1 tPHL, tPLH Propagation Delay Time Signal Input to Signal Output
VDD
VDD
VCON
VDD
CONTROL
RL
1kΩ
VDD
OUT/IN
VOS
0V
VIS=0V
IN/OUT
VSS
CL
50pF
VDD
VOL
tPZL
VDD
50%
0V
tPZL
90%
VDD
VOL
Fig. 3 tPZL, tPLZ Propagation Delay Time Control to Signal Output
tPLZ
50%
tPLZ
10%
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
6 of 8
QW-R502-739.A
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