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| 4066 Datasheet, PDF (5/7 Pages) Unisonic Technologies – QUAD BILATERAL SWITCH | |||
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4066
CMOS IC
 SPECIAL CONSIDERATIONS
In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability
should exceed VDD/RL (RL=effective external load of the UTC 4066 bilateral switches).This provision avoids any
permanent current flow or clamp action of the VDD supply when power is applied or removed from UTC 4066.
In certain applications, the external load-resistor current may include both VDD and Signal-line components. To
avoid drawing VDD current when switch current flows into terminals 1,4,8 or 11,the voltage drop across the
bidirectional swith must not exceed 0.6V at TA ⤠25â, or 0.4V at TA >25â (calculated from RON values shown).
NO VDD current will flow through RL if the switch current flows into terminals2, 3, 9 or 10.
 AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS
VC
VIS=0V
VDD VDD
CONTROL VDD
1 OF 4
IN/OUT OUT/IN
SWITCHES
VSS
RL
1KΩ
VOS
CL
50pF
tPZL
tPLZ
VDD
VDD
50%
50%
0V
tPZL
0V
tPLZ
VDD
90%
VDD
10%
VOL
VOL
Fig. 3 tPZL, tPLZ Propagation Delay Time Control to Signal Output
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 7
QW-R502-009.D
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