UM3352E_15 Datasheet, PDF (7/13 Pages) Union Semiconductor, Inc. – ESD-Protected, Slew-Rate-Limited, Fail-Safe, True RS-485 Transceivers

UM3352E
Table2. Receiving
______
INPUTS
RE
DE
0
X
0
X
0
X
1
1
1
0
X=Don’t care; High-Z=High impedance
A-B
≥-50mV
≤-200mV
Open/Shorted
X
X
Typical Operating Circuit
120ohm
DI
B
B
D
DE
A
A
RO
R
RE
B
A
Master Node
R
D
B
A
R
D
OUTPUTS
RO
1
0
1
High-Z
Shutdown
120ohm
B
A
DE
D
DI
R
RO
RE
Terminal Slave Node
DI DE RO RE
Slave Node1
DI DE RO RE
Slave Node N
Figure 1. Typical Half-Duplex RS-485 Network
Test Circuit
B
RLOAD/2
VOD
RLOAD/2 ^VOC
A
3V
DE
CL2
DI
A
VOD2 ^RDIFF
B
CL1
Figure 2. Driver DC Test Load
Figure 3. Driver Timing Test Circuit
Driver Output
Under Test
CL
500ohm
+
V_CC
S1
S2
Receive ^{Test Point}
Output
+
S1
CRL
15pF
1K
S2
1K
VCC
Figure 4. Driver Enable/Disable Timing Test Load Figure 5. Receiver Enable/Disable Timing Test Load
B
ATE
VD
R ^Receiver
Output
A
Figure 6. Receiver Propagation Delay Test Circuit
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http://www.union-ic.com Rev.07 Sep.2015
7/13