CHA2069 Datasheet, PDF (7/8 Pages) United Monolithic Semiconductors – 18-31GHz Low Noise Amplifier

18-31GHz Low Noise Amplifier
Typical Chip Assembly
CHA2069
Chip Biasing options
This chip is self-biased, and flexibility is provided by the access to number of pads. the
internal DC electrical schematic is given in order to use these pads in a safe way.
The two requirements are :
N°1 : Not exceed Vds = 3.5Volt ( internal Drain to Source voltage ).
N°2 : Not biased in such a way that Vgs becomes positive.
( internal Gate to Source voltage )
We propose two standard biasing :
Low Noise and low consumption :
Vd = 4.5V and B, D, E grounded.
All the other pads non connected ( NC ).
Idd = 55mA & Pout-1dB = 10dBm Typical.
( Equivalent to A,B,C,D,E F: non connected and Vd=4.5V ; G1=G2=G3=+1.V ).
Low Noise and higher output power
Vd = 4.5V and B, C, F grounded.
All the other pads non connected ( NC ).
Idd = 75mA & Pout-1dB = 12dBm Typical..
Ref. :DSCHA20699273 - 8-Sep-99
7/8
Specifications subject to change without notice
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