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CHR3762-QDG Datasheet, PDF (2/16 Pages) United Monolithic Semiconductors – 5.5-9GHz Integrated Down Converter
CHR3762-QDG
5.5-9GHz Integrated Down Converter
Electrical Characteristics
Tamb.= +25°C, VD1= VD2= VD3 = +3.0V (1)
Symbol
Parameter
FRF
RF Frequency range
FLO
LO frequency range
FIF
IF frequency range
G
Conversion gain (2)
NF Noise Figure
Im_rej Image rejection (2)
PLO
LO Input power
IIP3 Input IP3
LO RL LO return loss
RF RL RF return loss
VDx
VG1
DC drain voltage
1st stage LNA DC gate voltage
VG2 2nd stage LNA DC gate voltage
VG3 LO buffer DC gate voltage
VG4
Id
Mixer DC gate voltage
Total drain current (ID1+ID2+ID3) (3)
Min Typ Max Unit
5.5
9.0 GHz
4.0
12.0 GHz
DC
3.5 GHz
14
dB
1.7
dB
15
dBc
5
dBm
3
dBm
12
dB
9
dB
3
V
-0.45
V
-0.35
V
-0.45
V
-1
V
100
mA
These values are representative of onboard measurements as defined on the drawing in
paragraph "Evaluation mother board".
(1) VD1: 1st stage LNA drain bias voltage. VD2: 2nd stage LNA drain bias voltage.
(1) VD3: LO-chain drain bias voltage.
(2) An external combiner 90° is required on I / Q.
(3) ID1: 1st stage LNA drain current, typically 17mA, should be tuned with VG1.
(3) ID2: 2nd stage LNA drain current, typically 45mA, should be tuned with VG2.
(3) ID3: LO-chain drain current, typically 38mA, should be tuned with VG3.
Electrostatic discharge sensitive device observe handling precautions!
Ref. : DSCHR3762-QDG2335 - 30 Nov 12
2/16
Specifications subject to change without notice
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