CHA3024-QGG_15 Datasheet, PDF (11/16 Pages) United Monolithic Semiconductors – 2-22GHz LNA with AGC

2-22GHz LNA with AGC
Application Circuit:
Vg2
10nF
100pF
1
RFIN
4
CHA3024-QGG
Vd
100pF
10nF
25
19 RFOUT
CHA3024-QGG
13
100pF
10nF
Vg1
Depending on the board, additional capacitors such as 1µF may be added on each biasing
access if necessary, for better low frequency decoupling.
Pin Description:
Pin
5,18, 29 (exposed PAD)
2,3,6,7,8,9,10,11,12,14,15,
16,17,20,21,22,23,24,26,27,28
4
13
19
25
1
Symbol
GND
NC
RF IN
VG1
RF OUT
VD
VG2
Description
Must be grounded properly, internal
connections to ground are made
No internal connections
RF input
Gate voltage, bias network required
RF output
Drain voltage, bias network required
Gate voltage bias network required
UMS recommends also to ground Pin 2,3,5,6,7,15,16,17,18,20,21 (see proposed footprint
p14).
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
11/16
Specifications subject to change without notice
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