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TQ8103 Datasheet, PDF (1/9 Pages) TriQuint Semiconductor – 622 Mb/s Clock & Data Recovery | |||
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TRIQUINT
S E M I C O N D U C T O R, I N C .
The TQ8103 is a monolithic clock and data recovery (CDR) IC that receives
NRZ data, extracts the high-speed clock, and presents the separated data
and clock as its outputs. This device is designed specifically for SONET
OC-12 and SDH STM-4 applications at 622 Mb/s.
Its on-chip phase-locked loop (PLL) generates a stable 622.08 Mb/s
reference based upon an external 38.88 MHz TTL reference. The PLL is
based on a VCO constructed from integrated reactive components, which
form a low-jitter, high-Q differential tank circuit. Both frequency- and
phase-detect circuits reliably acquire and hold lock in worst-case SONET
jitter conditions and scrambling patterns. The lock-detect circuitry signals
when the CDR acquires frequency lock.
Typical SONET/SDH system applications for the TQ8103 include:
⢠Transmission system transport cards
⢠Switch and cross-connect line cards
⢠ATM physical layer interfaces
⢠Test equipment
⢠Add/drop multiplexers
Figure 1. Typical Application
1000 pF 10Kâ¦
50 â¦
VTT
SINO
ECL data in
SINI
(single-ended)
VREF
38.88-MHz TTL
clock oscillator CKREF
20Kâ¦
62 â¦
1000 pF
DOUTP
DOUTN
CKOUTP
CKOUTN
1 mF
50 â¦
VTT
50 â¦
VTT
TQ8103
622 Mb/s Clock
& Data Recovery
Features
⢠Single-chip CDR circuit for
622 Mb/s data
⢠Exceeds Bellcore and ITU jitter
tolerance maps
⢠Single-ended ECL input has loop-
through path for external 50 ohm
termination to minimize stubs
and reflections
⢠Clock and data outputs are
differential ECL
⢠Provides complete high-speed
OC-12/STM-4 solution when
used with TQ8101 or TQ8105
Mux/Demux/Framer/PLL
⢠External loop filter requires
simple passive network
⢠Maintains clock in absence of data
⢠28-pin leaded chip carrier
⢠Can be used with a high-speed
external clock
For additional information and latest specifications, see our website: www.triquint.com
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