TC9404FNG Datasheet, PDF (9/15 Pages) Toshiba Semiconductor – Σ-Δ Modulation System DA Converter with Analog Filter

TC9404FNG
9-2 Serial Mode ( _P/S = “L”: microcontroller setting mode)
It is possible to make the various settings with a microcontroller when in the serial mode.
Pins 18, 19 and 20 are used as the command input pins shown in the table below when in the serial
mode.
Table 4 Pin Names at The Serial Mode
Pin No.
18
19
20
Pin Name
Function
LATCH
SHIFT
ATT
Data latch signal input pin
Shift clock signal input pin
Data input pin
The LATCH signals and ATT signals are loaded to the LSI internal shift registers on the SHIFT
signal rising edge. It is consequently necessary for the data input from the ATT pin on the shift signal
rising edge to be valid as indicated in the timing example in Figure 10. It is also necessary for the
LATCH pulse to rise at least 1.5 µs after the final clock rising edge input from the SHIFT pin.
Operating the shift clock with LATCH low destabilizes the internal state, which may lead to
malfunctions, so it must therefore be set to the low level after loading D7 to the register.
A = 1.5 µs or higher, B = 1.5 µs or higher
Figure 10 Example of Data Setting Timing in the Serial Mode
The various control settings when in the serial mode are shown in the table below.
Ensure that all control bits are set when the power supply is turned on.
Table 5 Serial Mode Control Settings
Serial Input Data
Control Signal
D7
0
1
D6
AT6
µBS
D5
AT5
µEMP
D4
AT4
⎯
D3
AT3
⎯
D2
AT2
⎯
D1
AT1
⎯
D0
AT0
⎯
AT0~6: Attenuation level setting
µBS: De-emphasis mode select
µEMP: De-emphasis ON/OFF switch
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2006-04-27