TC9404FNG Datasheet, PDF (6/15 Pages) Toshiba Semiconductor – Σ-Δ Modulation System DA Converter with Analog Filter

TC9404FNG
4. De-Emphasis Filter
The built-in digital de-emphasis circuit is available for three kind of sampling frequency, fs of 32 kHz,
44.1 kHz, and 48 kHz. These setting controlled in the parallel mode ( P/S = “H”) with the LATCH (BS) pin
(pin 18) and SHIFT (EMP) pin (pin 19).
This is set in the serial mode ( P/S = “L”) with a microcontroller or other equipment. (refer to 9-2
microcontroller setting mode for further details on serial mode settings.)
Table 2 De-Emphasis Filter Setting (when in the parallel mode)
LATCH (BS)
SHIFT (EMP)
MODE (fs SELECT)
H
H
L
L
H
L
H
L
32
48
44.1
OFF (kHz)
The digitalization of the de-emphasis filter eliminates the need for such external components as resistors,
condensers and analog switches. In addition to this, the coefficients are aligned to reduce error in the
de-emphasis filter characteristics.
The filter structure and characteristics are shown below.
Transfer function:
H (Z) =
(b₀ + b₁Z^−1)
(1− a₁Z^−1)
Figure 4 IIR Digital De-Emphasis Filter
T₁ = 50 µs, T₂ = 15 µs
Figure 5 Filter Characteristics
5. DA Conversion Circuit
The IC incorporates a 2’nd Σ-∆ modulation DA converter for two channels (simultaneous output type).
The internal structure of this is shown in Figure 6.
2’nd ∑-∆ converter: Y (Z) = X (Z) + (1 − Z^−1)²Q (Z)
Figure 6 Σ-∆ Modulation DA Converter
6
2006-04-27