TC9324F Datasheet, PDF (80/101 Pages) Toshiba Semiconductor – Single-Chip DTS Microcontroller (DTS-20)

7. Serial Interface Structure
TC9324F
SIO F/F COUNT
8 BIT
Shift counter
Interrupt request
BUSY STA F/F
STP
CK1 SCK-
CK2 INV ^{edge STA}
900 kHz
75 kHz
Shift clock generator
SCK-
INV ^edge
Shift clock
Shift control
SCK3/
SCK4
Output
setting
STP F/F
STA F/F
BUSY4
2-line
serial
interface
detection
MODE F/F
reset
4-bit shift register
8 BIT
ACK
detection
SO NG
F/F
Nch F/F
reset
Data control
ENA
BUSY MODE ^SO3/SO4
4-bit shift register
SI3S
Output
setting
MSB
Selector
SO0 SO1 SO2 SO3
SO4 SO5 SO6 SO7
SI0~SI3
Serial output data
Serial input data
SI4~SI7
-3 -2 -1 -0
I/O port 4 data
Output
setting
-3 -2 -1 -0
I/O port 4
I/O control data
SCK3/
64 _SCK4
(P5-3)
SO3/
63 _SO4
(P5-2)
SI3
62 _(P5-1)
The serial interface consists of a control circuit, shift registers, and I/O ports.
Note: The SI pin can also be used as I/O port 5 (P5-1).
Note: The contents of the shift registers are loaded to data memory as the data and serial input data.
Therefore, the data set as serial output data and the serial input data do not match.
Note: The serial input pins all incorporate Schmitt trigger circuits.
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2002-02-08