TC55VEM416AXBN55 Datasheet, PDF (8/14 Pages) Toshiba Semiconductor – 1,048,576-WORD BY 16-BIT FULL CMOS STATIC RAM

TIMING DIAGRAMS
READ CYCLE ^{(See Note 1)}
Address
A0~A19
CE1
CE2
OE
UB , LB
D_OUT
I/O1~16
Hi-Z
TC55VEM416AXBN55
t_RC
t_ACC
t_OH
t_CO1
t_CO2
t_OE
t_OD
t_BA
t_ODO
t_BE
t_OEE
t_COE
t_BD
VALID DATA OUT
Hi-Z
WRITE CYCLE 1 (R/W CONTROLLED) ^{(See Note 4)}
Address
A0~A19
R/W
CE1
CE2
UB , LB
D_OUT
I/O1~16
D_IN
I/O1~16
t_AS
(See Note 2)
(See Note 5)
t_WC
t_WP
t_WR
t_CW
t_CW
t_BW
t_ODW
t_OEW
Hi-Z
t_DS
t_DH
VALID DATA IN
(See Note 3)
(See Note 5)
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