TC55VEM416AXBN55 Datasheet, PDF (12/14 Pages) Toshiba Semiconductor – 1,048,576-WORD BY 16-BIT FULL CMOS STATIC RAM

TC55VEM416AXBN55
Note:
(1)
(2)
(3)
(4)
(5)
In CE1 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V or
CE2 ≥ VDD − 0.2 V.
When CE1 is operating at the VIH(min.) level, the operating current is given by IDDS1 during the
transition of VDD from 2.3(2.7) to 2.2V(2.4 V).
In CE2 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V.
In UB (or LB ) controlled data retention mode, minimum standby current mode is entered when CE1
≤ 0.2 V or CE1 ≥ VDD − 0.2 V, CE2 ≤ 0.2 V or CE2 ≥ VDD − 0.2 V.
When CE1 is operating at the VIH(min.) level, the operating current is given by IDDS1 during the
transition of VDD from 2.3(2.7) to 2.2V(2.4 V).
2002-08-29 12/14