TMP86PM23UG Datasheet, PDF(77/214 Page) Toshiba Semiconductor – 8 Bit Microcontroller

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TMP86PM23UG Datasheet, PDF (77/214 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

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TMP86PM23UG

6.2 Divider Output (DVO)

Approximately 50% duty pulse can be output using the divider output circuit, which is useful for piezoelectric

buzzer drive. Divider output is from DVO pin.

6.2.1 Configuration

Data output

Output latch

DQ

fc/213 or fs/25

fc/212 or fs/24

fc/211 or fs/23

fc/210 or fs/22

MPX

A

B

CY

D

S

2

DVOCK

DVOEN

TBTCR

Divider output control register

(a) configuration

DVO pin

Port output latch

TBTCR<DVOEN>

DVO pin output

(b) Timing chart

Figure 6-3 Divider Output

6.2.2 Control

The Divider Output is controlled by the Time Base Timer Control Register.

Time Base Timer Control Register

TBTCR

(0036H)

7

DVOEN

6

5

4

3

2

DVOCK

(DV7CK) (TBTEN)

1

0

(TBTCK)

(Initial value: 0000 0000)

DVOEN

Divider output

enable / disable

DVOCK

Divider Output (DVO)

frequency selection: [Hz]

0: Disable

1: Enable

NORMAL1/2, IDLE1/2 Mode

DV7CK = 0

DV7CK = 1

00

fc/213

01

fc/212

10

fc/211

11

fc/210

fs/25

fs/24

fs/23

fs/22

SLOW1/2

SLEEP1/2

Mode

fs/25

fs/24

fs/23

fs/22

R/W

R/W

Note: Selection of divider output frequency (DVOCK) must be made while divider output is disabled (DVOEN="0"). Also, in other

words, when changing the state of the divider output frequency from enabled (DVOEN="1") to disable(DVOEN="0"), do not

change the setting of the divider output frequency.

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