TMP86P820FG Datasheet, PDF (73/170 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86P820FG
6. Time Base Timer (TBT)
The time base timer generates time base for key scanning, dynamic displaying, etc. It also provides a time base
timer interrupt (INTTBT).
6.1 Time Base Timer
6.1.1 Configuration
fc/2²³ or fs/2¹⁵
fc/2²¹ or fs/2¹³
fc/2¹⁶ or fs/2⁸
fc/2¹⁴ or fs/2⁶
fc/2¹³ or fs/2⁵
fc/2¹² or fs/2⁴
fc/2¹¹ or fs/2³
fc/2⁹ or fs/2
MPX
Source clock
Falling edge
detector
3
TBTCK
TBTCR
TBTEN
Time base timer control register
Figure 6-1 Time Base Timer configuration
IDLE0, SLEEP0
release request
INTTBT
interrupt request
6.1.2 Control
Time Base Timer is controlled by Time Base Timer control register (TBTCR).
Time Base Timer Control Register
7
6
5
4
3
2
1
0
TBTCR
(0036H)
(DVOEN)
(DVOCK)
(DV7CK) TBTEN
TBTCK
(Initial Value: 0000 0000)
TBTEN
Time Base Timer
enable / disable
TBTCK
Time Base Timer interrupt
Frequency select : [Hz]
0: Disable
1: Enable
000
001
010
011
100
101
110
111
NORMAL1/2, IDLE1/2 Mode
DV7CK = 0
DV7CK = 1
fc/2²³
fc/2²¹
fc/2¹⁶
fc/2¹⁴
fc/2¹³
fc/2¹²
fc/2¹¹
fc/2⁹
fs/2¹⁵
fs/2¹³
fs/2⁸
fs/2⁶
fs/2⁵
fs/2⁴
fs/2³
fs/2
Note 1: fc; High-frequency clock [Hz], fs; Low-frequency clock [Hz], *; Don't care
Page 59
SLOW1/2
SLEEP1/2
Mode
fs/2¹⁵
fs/2¹³
–
R/W
–
–
–
–
–