TMP91C820A Datasheet, PDF (72/360 Pages) Toshiba Semiconductor – Original CMOS 16-Bit Microcontroller

TMP91C820A
3.5.6
Port Z (PZ0 to PZ3)
Port Z is an 4-bit general-purpose I/O port (P50 and P51 are used for output only). I/O is
set using control register PZCR and PZFC. Resetting resets all bits of the output latch PZ
to 1.
In addition to functioning as a general-purpose I/O port, port Z also functions as I/O for
the CPU’s control/status signal.
When PZ0 pin is defined as RD strobe signal output mode (<PZ0F> = 1), clearing the
output latch register <PZ0> to 0 outputs the RD strobe (Used for the peused static RAM)
from the PZ0 pin even when the internal addressed. If the output latch register <PZ0>
remains 1, the RD strobe signal is output only when the external address are is accessed.
Resetting initializes PZ2 and PZ3 pins to input mode with pull-up resistor.
Setting the AM1 and AM0 pins as shown below and resetting the device initialize PZ0
and PZ1 pins to the following function pins.
PZ0F Function Setting after Reset is Released
AM1 AM0
PZ1F
PZ0 function
PZ1 function
0
0
0
1
1
0
1
1
1
RD pin
WR pin
1
RD pin
WR pin
– Don’t use this setting Don’t use this setting
0
Output port
Output port
Reset
Function control
(on bit basis)
PZFC write
Output
latch
PZ write
S
A
B
PZ0 ( RD )
Output buffer
PZ read
RD
Internal address area
Figure 3.5.11 Port Z (PZ0)
91C820A-70
2006-01-31