TC55NEM208A Datasheet, PDF (7/10 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55NEM208AFPN/AFTN55,70
DATA RETENTION CHARACTERISTICS (Ta = −40° to 85°C)
SYMBOL
PARAMETER
MIN
TYP
V_DH
Data Retention Supply Voltage
2.0

I_DDS2
Standby Current
Ta = −40~40°C


Ta = −40~85°C


t_CDR
Chip Deselect to Data Retention Mode Time
0

t_R
Recovery Time
5

MAX
5.5
3
20


UNIT
V
µA
ns
ms
CE CONTROLLED DATA RETENTION MODE
V_DD
4.5 V
DATA RETENTION MODE
V_IH
CE
GND
(See Note)
t_CDR
V_DD − 0.2 V
(See Note)
t_R
Note: When CE is operating at the V_IH level (2.2V), the standby current is given by I_DDS1 during the transition
of V_DD from 4.5 to 2.4V.
2002-09-18 7/10