TB1328FG Datasheet, PDF (7/47 Pages) Toshiba Semiconductor – Audio SW, Video SW, Sync Separation and H/V Frequency Counter IC for TVs

TB1328FG
Pin Functions
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Pin
No.
Pin Name
Function
Interface Circuit
21 Vdd (3.3 V)
VCC pin for the logical circuits.
Supply power through a resistor from pin 11
as in the Application Circuit. This pin voltage
is clipped to 3.3 V (typ.) by the internal
regulator.
19 Vss
GND pin for the logical circuits.
−
VCC pin for the sync and video circuits.
7 V/S VCC (5 V)
−
Connect 5.0 V (typ.)
12 V/S GND
GND pin for the sync and video circuits.
−
VCC pin for the audio circuits.
16 AU VCC (9 V)
−
Connect 9.0 V (typ.)
24 AU GND
GND pin for the audio circuits.
−
7
42 SY1 IN
46 CVBS3 IN
60 SY2 IN
CVBS or Y input pin.
Input the CVBS or Y signal in NTSC, PAL or
SECAM via a clamp capacitor.
42
200Ω
46
60
200Ω
12
44 SC1 IN
62 SC2 IN
Chroma signal input pin.
Input C signal via a capacitor.
This pin’s voltage is detected and the status
is returned to I²CBUS Read functions S2 or
S6. It is used for detecting whether S-pin is
connected or not.
40 Y1/G1 IN
52 Y2/G2 IN
58 Y3/G3 IN
Y, G or CVBS input pin.
Input the signal via a clamp capacitor.
The clamp system is selectable by
CLAMP1, 2 or 3 registers.
7
40
200Ω
52
58
12
Input Signal/Output Signal
3.3 V (typ.)
−
5.0 V (typ.)
−
9.0 V (typ.)
−
Sync tip level: 2.3 V (typ.)
Y/CVBS signal amplitude:
1.0 Vp-p (with sync)
2.9 V bias (typ.)
Burst signal amplitude:
0.3 Vp-p
Sync tip level: 2.3 V (typ.)
Bias level: 2.9 V (typ.)
Y/G/CVBS signal amplitude:
1.0 Vp-p (with sync)
38 Cb1/B1 IN
50 Cb2/B2 IN
56 Cb3/B3 IN
Cb, B or C input pin.
Input the signal via a capacitor.
2.9 V bias (typ.)
Cb/B signal amplitude:
0.7 Vp-p (without sync)
Burst signal amplitude:
0.3 Vp-p
7
2006-11-13