TMP88CS38 Datasheet, PDF (65/226 Pages) Toshiba Semiconductor – 8-bit single chip microcomputer

TMP88CS38/CM38A/CP38A
TC1 pin input
Internal clock
Count start
Count start
TC1S = 10 at the
rising edge
Up counter
TC1DRA
0
1 23 4
n
n−1 n
0
Match detect
Counter clear
1 23
INTTC1
interrupt
TC1 pin input
Count start
(a) Trigger start (METT1 = 0)
Counter clear
Count start
TC1S = 10
at the rising
edge
Internal clock
Up counter
TC1DRA
INTTC1
interrupt
0
1 23
n
m−1 m
0
12 3
(b) Trigger start and stop (METT1 = 1)
n−1 n
0
Match detect
Counter clear
m<n
Figure 2.5.4 External Trigger Timer Mode Timing Chart
(3) Event counter mode
In this mode, events are counted at the edge of the TC1 pin input (Either the rising
or falling edge can be selected with the external trigger TC1CR<TC1S>). The contents
of TC1DRA are compared with the contents of up counter. If a match is found, an
INTTC1 interrupt is generated, and the counter is cleared.
Match detect is executed on other edge of count-up. A match can not be detected and
INTTC1 is not generated when the pulse is still in same state.
Setting ACAP1 to “1” transfers the current contents of up counter to TC1DRB
(Auto-capture function).
Count start
TC1 pin input
Up counter
TC1DRA
0
1
2
?
n
INTTC1 interrupt
n−1
n0
1
TC1S = 10
at the falling
edge
2
Match detect
Counter clear
Figure 2.5.5 Event Counter Mode Timing Chart
Table 2.5.2 Input Pulse Width for Timer/Counter 1
Minimum Pulse Width [s]
NORMAL/IDLE
“H” Width
“L” Width
2³/fc
2³/fc
88CS38-65
2007-09-12