|
TLP2200_07 Datasheet, PDF (5/7 Pages) Toshiba Semiconductor – High Speed Line Receiver | |||
|
◁ |
TLP2200
Test Circuit 1 tpHL, tpLH, tr and tf
Input IF
Output VO
tpLH
90%
10%
tr
IF(ON)
50%
tpHL
0mA
VOH
1.3V
VOL
tf
Pulse
Generator
tr = tf = 5ns
VO = 5V
Input
Monitoring
Node
R1
Output VO
Monitoring
Node
VCC
5V
1
VCC 8
2
7
3
6
GND
4
5
C1=120pF
D1~D4
: 1S1588
D1 D2
CL
D3
D4
R1
IF(ON)
2.15kâ¦
1.6mA
1.1kâ¦
3mA
681â¦
5mA
C1 is peaking capacitor. The probe and jig
capacitances are include in C1.
CL is approximately 15pF which includes probe
and stray wiring capacitance.
Test Circuit 2 tpHZ, tpZH, tpLZ and tpZL
Input VE
Output VO
IF=IF (OFF)
tPZL
S1 Closed
S2 Open
Output VO
IF=IF (ON)
S1 Open
S2 Closed
1.3V
tPZH
1.3V
0V
Pulse
Generator
ZO = 50â¦
tr = tf = 5ns
3.0V
1
1.3V
0V
IF
2
tPLZ S1 and S2
0.5V Closed
3
VOL Input VE
4
Monitoring
tPHZ 0.5V
VOH
~~1.5V
S1 and S2
Node
Closed
5V
VCC
S1
VO
VCC 8
GND
7
CL
6
5
D1~D4
: 1S1588
D1 D2
D3
D4
S2
CL is approximately 15pF which includes probe
and stray wiring capacitance.
5
2007-10-01
|
▷ |