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TLP2168_15 Datasheet, PDF (5/16 Pages) Toshiba Semiconductor – Inverter logic type (open collector output) | |||
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TLP2168
11. Switching Characteristics (Note)
(Unless otherwise specified, Ta = -40 to 125 î, VCC = 2.7 to 5.5 V (Each channel))
Characteristics
Symbol Note
Test
Circuit
Test Condition
Min Typ. Max Unit
Propagation delay time
(H/L)
tpHL (Note 1) Fig. IF = 0 â 7.5 mA, RL = 350 â¦,
12.1.5 CL = 15 pF
î¥
35
60
ns
Propagation delay time
(L/H)
tpLH (Note 1)
IF = 7.5 â 0 mA, RL = 350 â¦,
CL = 15 pF
î¥
35
60
Pulse width distortion
|tpHL-
tpLH|
(Note 1)
IF = 0 ââ 7.5 mA, RL = 350 â¦,
î¥
î¥
35
CL = 15 pF
Propagation delay skew
(device to device)
tpsk (Note 1),
(Note 2)
-40
î¥
40
Fall time
Rise time
Common-mode transient
immunity at output high
Common-mode transient
immunity at output low
tf
tr
CMH
CML
(Note 1)
(Note 1)
Fig.
12.1.6
IF = 0 â 7.5 mA, RL = 350 â¦,
CL = 15 pF
IF = 7.5 â 0 mA, RL = 350 â¦,
CL = 15 pF
VCM = 1000 Vp-p, IF = 0 mA,
VCC = 5 V, Ta = 25 î
VCM = 1000 Vp-p, IF = 10 mA,
VCC = 5 V, Ta = 25 î
î¥
30
î¥
30
15
î¥
-15
î¥
î¥
î¥
î¥ kV/µs
î¥
Note: All typical values are at Ta = 25 î.
Note 1: f = 5 MHz, duty = 50%, input current tr = tf = 5 ns or less, CL is approximately 15 pF which includes probe and
stray wiring capacitance.
Note 2: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
©2015 Toshiba Corporation
5
2015-12-10
Rev.6.0
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