TC74HC259AP_07 Datasheet, PDF (5/10 Pages) Toshiba Semiconductor – 8-Bit Addressable Latch

Timing Requirements (input: t_r = t_f = 6 ns)
Characteristics
Symbol
Minimum pulse width
(G )
Minimum pulse width
( CLEAR )
Minimum set-up time
(DATA)
Minimum set-up time
(A, B, C)
Minimum hold time
(DATA)
Minimum hold time
(A, B, C)
t_{W (L)}
t_{W (L)}
t_s
t_s
t_h
t_h
TC74HC259AP/AF/AFN
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
V_CC (V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Ta = 25°C
Ta =
−40
~85°C ^Unit
Typ. Limit Limit
⎯
75
95
⎯
15
19
ns
⎯
13
16
⎯
75
95
⎯
15
19
ns
⎯
13
16
⎯
50
60
⎯
10
12
ns
⎯
9
11
⎯
25
30
⎯
5
6
ns
⎯
5
5
⎯
25
30
⎯
5
6
ns
⎯
5
5
⎯
0
0
⎯
0
0
ns
⎯
0
0
AC Characteristics (C_L = 15 pF, V_CC = 5 V, Ta = 25°C, input: t_r = t_f = 6 ns)
Characteristics
Symbol
Test Condition
Min Typ. Max Unit
Output transition time
t_TLH
t_THL
Propagation delay time
t_pLH
(DATA-Q)
t_pHL
Propagation delay time
t_pLH
(A, B, C-Q)
t_pHL
Propagation delay time
t_pLH
( G -Q)
t_pHL
Propagation delay time
( CLEAR -Q)
t_pHL
⎯
⎯
4
8
ns
⎯
⎯
15
22
ns
⎯
⎯
21
32
ns
⎯
⎯
16
28
ns
⎯
⎯
13
23
ns
5
2007-10-01