TC554161AFTI-70 Datasheet, PDF (5/10 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC554161AFTI-70,-85,-10,-70L,-85L,-10L
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = -40° to 85°C, V_DD = 5 V ± 10%)
READ CYCLE
SYMBOL
PARAMETER
t_RC
t_ACC
t_CO
t_OE
t_BA
t_OH
t_COE
t_OEE
t_BE
t_OD
t_ODO
t_BD
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Output Data Hold Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
-70,-70L
MIN MAX
70
¾
¾
70
¾
70
¾
35
¾
35
10
¾
5
¾
0
¾
0
¾
¾
30
¾
30
¾
30
TC554161AFTI
-85,-85L
MIN MAX
85
¾
¾
85
¾
85
¾
45
¾
45
10
¾
5
¾
0
¾
0
¾
¾
35
¾
35
¾
35
-10,-10L
MIN MAX
100
¾
¾
100
¾
100
¾
50
¾
50
10
¾
5
¾
0
¾
0
¾
¾
40
¾
40
¾
40
UNIT
ns
WRITE CYCLE
SYMBOL
PARAMETER
t_WC
t_WP
t_CW
t_BW
t_AS
t_WR
t_DS
t_DH
t_OEW
t_ODW
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Setup Time
Write Recovery Time
Data Setup Time
Data Hold Time
R/W High to Output Active
R/W Low to Output High-Z
AC TEST CONDITIONS
PARAMETER
Output load
Input pulse level
Timing measurements
Reference level
t_R, t_F
-70,-70L
MIN MAX
70
¾
50
¾
60
¾
50
¾
0
¾
0
¾
30
¾
0
¾
0
¾
¾
30
TC554161AFTI
-85,-85L
MIN MAX
85
¾
55
¾
70
¾
55
¾
0
¾
0
¾
35
¾
0
¾
0
¾
¾
35
-10,-10L
MIN MAX
100
¾
60
¾
80
¾
60
¾
0
¾
0
¾
40
¾
0
¾
0
¾
¾
40
UNIT
ns
TEST CONDITION
100 pF + 1 TTL Gate
0.4 V, 2.6 V
1.5 V
1.5 V
5 ns
2001-08-17 5/10