TMPR3911 Datasheet, PDF (412/462 Pages) Toshiba Semiconductor – 32-Bit TX System RISC TX39 Family

<POWER>
Symbol
Parameter
t₁
VSTANDBY to PON* Rising
t₂
VSTANDBY to ONBUTN delay time
t₃
PWROK Rising to ONBUTN Rising
t₄
PON* Rising to ONBUTN Rising
t₅
PWRCS Rising to VCC3 Rising
t₆
ONBUTN pulse width
t1
VSTANDBY
(VDD) *1
PON*
Chapter 18 Electrical Characteristics
Rising/Falling
Min

50

2

2

1

0

1
Max






Unit
ms
s
s
us
s
us
t4
RESET
(internal signal)
PWROK
ONBUTN
t3
t2
t6
PWRCS
VCC3
t5
tSELC2MS
ENSYSCLK
(internal signal)
CPU clock is disabled
CPU clock is enabled
Power Timing
*1 This signal is power for the TMPR3912 and other components in the system that
must never lose power. That means VDD iteself for TMPR3912.
<CPU RESET>
Item
Parameter
t₁
CPURES* low time
CPURES
Rising/Falling
Min

10
t1
Max
Unit

ns
CPU Reset Timing
18-52