TC55W1600FT Datasheet, PDF (4/13 Pages) Toshiba Semiconductor – 1,048,576-WORD BY 16-BIT/2,097,152-WORD BY 8-BIT FULL CMOS STATIC RAM

TC55W1600FT-55,-70
DC CHARACTERISTICS (Ta = −40° to 85°C, V_DD = 2.3 to 3.1 V)
SYMBOL PARAMETER
TEST CONDITION
MIN TYP MAX UNIT
I_IL
I_OH
I_OL
I_LO
l_DDO1
l_DDO2
Input Leakage
Current
V_IN = 0 V~V_DD
  ±1.0 µA
Output High Current V_OH = V_DD − 0.4V
Output Low Current V_OL = 0.4 V
Output Leakage
Current
CE1 = V_IH or CE2 = V_IL or LB = UB = V_IH or
R/W = V_IL or OE = V_IH, V_OUT = 0 V~V_DD
−1.0 
1.0 
 mA
 mA
  ±1.0 µA
Operating Current
CE1 = V_IL, CE2 = V_IH,
R/W = V_IH, LB = UB = V_IL,
I_OUT = 0 mA
Other Input = V_IH/V_IL
CE1 = 0.2 V, CE2 = V_DD − 0.2 V
R/W = V_DD − 0.2 V, LB = UB = 0.2 V,
I_OUT = 0 mA
Other Input = V_DD − 0.2 V/0.2 V
55 ns   60
t_cycle 70 ns   50 mA
1 µs
  10
55 ns   55
t_cycle 70 ns   45 mA
1 µs
 5
I_DDS1
1) CE1 = V_IH or CE2 = V_IL (at BYTE ≥ V_DD − 0.2 V or ≤ 0.2 V)
2) LB = UB = V_IH (at BYTE ≥ V_DD − 0.2 V)
  2 mA
I_DDS2
Standby Current
1) CE1 = V_DD − 0.2 V, CE2 =
V_DD − 0.2 V (at BYTE ≥ V_DD
− 0.2 V or ≤ 0.2 V)
2) CE2 = 0.2 V (at BYTE ≥ V_DD
− 0.2 V or ≤ 0.2 V)
Ta = 25°C
 1
V_DD = 3.1 V
Ta = −40~85°C   10
Ta = 25°C
 0.05 0.5 µA
3) LB = UB = V_DD − 0.2 V,
V_DD = 3.0 V Ta = −40~40°C  
1
CE1 = 0.2 V, CE2 = V_DD − 0.2 V
(at BYTE ≥ V_DD − 0.2 V)
Ta = −40~85°C   5
CAPACITANCE (Ta = 25°C, f = 1 MHz)
SYMBOL
PARAMETER
TEST CONDITION
C_IN
C_OUT
Input Capacitance
Output Capacitance
V_IN = GND
V_OUT = GND
Note: This parameter is periodically sampled and is not 100% tested.
MAX
10
10
UNIT
pF
pF
2002-02-12 4/13