TMP91C630 Datasheet, PDF (39/202 Pages) Toshiba Semiconductor – CMOS 16-Bit Microcontrollers

TMP91C630
(2) External interrupt control
Name Symbol Address 7

6
5
I2EDGE
I2LE
Interrupt
input mode
control 0
IIMC0
8CH
0
(no RMW) Write 0
0
0
INT2EDGE INT2
0: Rising 0: Edge
1: Falling 1: Level
4
3
I1DGE
I1LE
W
0
0
INT1EDGE INT1
0: Rising 0: Edge
1: Falling 1: Level
2
I0EDGE
1
I0LE
0
NMIREE
0
0
INT0EDGE INT0
0: Rising 0: Edge
1: Falling 1: Level
0
1: Operate
even on
rising/falling
edge of NMI
INT2 level enable
0 Edge detect INT
1 Level INT
INT1 level enable
0 Edge detect INT
1 Level INT
INT0 level enable
0 Edge detect INT
1 Level INT
NMI rising edge enable
0 INT request generation at falling edge
1 INT request generation at rising/falling edge
Name Symbol Address 7
6
5
4
3
2
1
0
Interrupt
input
mode
control1
IIMC1
8DH
(no RMW)
I5EDGE
I5LE
0
0
INT5EDGE INT5
0: Rising 0: Edge
1: Falling 1: Level
I4EDGE
I4LE
W
0
0
INT4EDGE INT4
0: Rising 0: Edge
1: Falling 1: Level
I3EDGE
I3LE
0
0
INT3EDGE INT3
0: Rising 0: Edge
1: Falling 1: Level
INT5 level enable
0 Edge detect INT
1 Level INT
INT4 level enable
0 Edge detect INT
1 Level INT
INT3 level enable
0 Edge detect INT
1 Level INT
When switching IIMC0 and 1 registers, first every FC registers in port which built-in INT function clear to 0.
91C630-37
2003-07-22