TMP91C630 Datasheet, PDF (147/202 Pages) Toshiba Semiconductor – CMOS 16-Bit Microcontrollers

TMP91C630
3.11.2 Description of Operation
(1) Analog reference voltage
A high-level analog reference voltage is applied to the VREFH pin; a low-level analog
reference voltage is applied to the VREFL pin. To perform AD conversion, the reference
voltage, the difference between VREFH and VREFL, is divided by 1024 using string
resistance. The result of the division is then compared with the analog input voltage.
To turn off the switch between VREFH and VREFL, program a 0 to
ADMOD1<VREFON> in AD mode control register 1. To start AD conversion in the
OFF state, first write a 1 to ADMOD1<VREFON>, wait for 3 Ps until the internal
reference voltage stabilizes (this is not related to fc), then set ADMOD0<ADS> to 1.
(2) Analog input channel selection
The analog input channel selection varies depends on the operation mode of the AD
converter.
x In analog input channel fixed mode (ADMOD0<SCAN> 0)
Setting ADMOD1<ADCH2:0> selects one of the input pins AN0 to AN7 as the
input channel.
x In analog input channel scan mode (ADMOD0<SCAN> 1)
Setting ADMOD1<ADCH2:0> selects one of the four scan modes.
Table 3.11.1 illustrates analog input channel selection in each operation mode.
On a reset, ADMOD0<SCAN> is set to 0 and ADMOD1<ADCH2:0> is initialized to
000. Thus pin AN0 is selected as the fixed input channel. Pins not used as analog input
channels can be used as standard input port pins.
Table 3.11.1 Analog Input Channel Selection
<ADCH2:0>
Channel Fixed
<SCAN> 0
Channel Scan
<SCAN> 1
000
AN0
AN0
001
AN1
AN0 o AN1
010
AN2
AN0 o AN1 o AN2
011
AN3
AN0 o AN1 o AN2 o AN3
100
AN4
AN4
101
AN5
AN4 o AN5
110
AN6
AN4 o AN5 o AN6
111
AN7
AN4 o AN5 o AN6 o AN7
(3) Starting AD conversion
To start AD conversion, write a 1 to ADMOD0<ADS> in AD mode control register 0
or ADMOD1<ADTRGE> in AD mode control register 1, pull the ADTRG pin input
from high to low. When AD conversion starts, the AD conversion busy flag
ADMOD0<ADBF> will be set to 1, indicating that AD conversion is in progress.
Writing a 1 to ADMOD0<ADS> during AD conversion restarts conversion. At that
time, to determine whether the AD conversion results have been preserved, check the
value of the conversion data storage flag ADREGxxL<ADRxRF>.
During AD conversion, a falling edge input on the ADTRG pin will be ignored.
91C630-145
2003-07-22