TMP89FW24ADFG Datasheet, PDF (385/548 Pages) Toshiba Semiconductor – 8 Bit Microcontroller TLCS-870/C1 Series

TMP89FW24A
AD converter control register 1
ADCCR1
7
6
5
4
3
2
1
0
(0x00034) Bit Symbol
ADRS
AMD
AINEN
SAIN
Read/Write
R/W
R/W
R/W
R/W
After reset
0
0
0
0
0
0
0
0
ADRS AD conversion start
AMD
AD operating mode
AINEN Analog input control
SAIN
Analog input channel select
0: -
1: AD conversion start
00: AD operation disable, forcibly stop AD operation
01: Single mode
10: Reserved
11: Repeat mode
0: Analog input disable
1: Analog input enable
0000:
0001:
0010:
0011:
0100:
0101:
0110:
0111:
1000:
1001:
1010:
1011:
1100:
1101:
1110:
1111:
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Note 1: Do not perform the following operations on the ADCCR1 register while AD conversion is being executed
(ADCCR2<ADBF>="1").
- Changing SAIN
- Setting AINEN to "0"
- Changing AMD (except a forced stop by setting AMD to "00")
- Setting ADRS to "1"
Note 2: If you want to disable all analog input channels, set AINEN to "0".
Note 3: Although analog input pins are also used as input/output ports, it is recommended for the purpose of maintaining the ac-
curacy of AD conversion that you do not execute input/output instructions during AD conversion. Additionally, do not in-
put widely varying signals into the ports adjacent to analog input pins.
Note 4: When STOP, IDLE0 or SLOW mode is started, ADRS, AMD and AINEN are initialized to "0". If you use the AD convert-
er after returning to NORMAL mode, you must reconfigure ADRS, AMD and AINEN.
Note 5: After ADRS is set to "1", it is automatically cleared to "0". The time between when ADRS is set to "1" and when it is
cleared to "0" is a maximum of 4/fcgck [s] when ADCCR2<ACK>="00*", a maximum of 15/fcgck [s] when
ADCCR2<ACK>="01*", and a maximum of 52/fcgck [s] when ADCCR2<ACK>="10*".
RA002
Page 369
2012/5/18