TA1276AN Datasheet, PDF (24/86 Pages) Toshiba Semiconductor – TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

TA1276AN
CHARACTERISTIC
Sharpness Control Range
Sharpness Control Center Gain
YNR Characteristic
SRT Response to 2T Pulse Input
SYMBOL
G_MAXL
G_MINL
G_MAXH
G_MINH
G_CENL
G_CENH
G_YL
G_YH
T_SL1
T_SRTL
T_SH1
T_SRTH
TEST
CIR-
CUIT
―
―
―
―
―
―
―
―
―
―
―
―
TEST CONDITION
MIN TYP. MAX UNIT
11
14
17
−11 −8
−5
(Note V₁₂)
11
14
17
−9
−6
−3
dB
7
10
13
―
7
10
13
−11 −8
−5
(Note V₁₃)
−9
−6
−4
100 120 140
40
60
80
(Note V₁₄)
ns
160 180 200
20
30
45
VSM Peak Frequency
VSM Gain
VSM Parabolic Modulating Gain
Threshold Voltage of VSM Muting
Response Time for VSM High Speed
Muting
Between Y2 Input and R Output Delay
Time
F_VL
F_VH
G_VL00
G_VL01
G_VL10
G_VL11
G_VH00
G_VH01
G_VH10
G_VH11
G_VRL
G_VLL
G_VRH
G_VLH
V_SR36
T_VML1
T_VML2
T_VML3
T_VML4
T_VMH1
T_VMH2
T_VMH3
T_VMH4
T_Y2RD
T_Y2RL
T_Y2RH
― When normal mode
7
9
11
MHz
― When double scan mode
12.5 16 19.5
―
11
13
15
―
−7.5 −6 −4.5
―
−11 −9
−8
―
−∞ −35 −29
(Note V₁₅)
―
11
13
15
―
−7.5 −6
−5
dB
―
−11 −9
−7
―
−∞ −32 −26
―
−4
−3
−2
―
−4
−3
−2
―
(Note V₁₆) _−4
−3
−2
―
−4
−3
−2
― Pin 32, Pin 36
0.65 0.75 0.85
V
―
0
50
100
―
0
50
100
―
0
50
100
―
0
50
100
(Note V₁₇)
―
0
50
100
―
0
50
100
ns
―
0
50
100
―
0
50
100
― When through
26
36
46
― When normal mode
200 220 240
― When double scan mode
85
100 115
24
2002-03-29