TMP91CW18A Datasheet, PDF (215/278 Pages) Toshiba Semiconductor – Original CMOS 16-Bit Microcontroller

TMP91CW18A
(3) Single-word data transfer
Check the <MST> setting using an INTI2C2 interrupt process after the transfer of
each word of data is completed and determine whether the device is in master mode or
slave mode.
1. If <MST> = 1 (Master mode)
Check the <TRX> setting and determine whether the device is in transmitter mode
or receiver mode.
If <TRX> = 1 (Transmitter mode)
Check the <LRB> setting. If <LRB> = 1, there is no receiver requesting data.
Implement the process for generating a stop condition (See section 3.10.6 (4)) and
terminate data transfer.
If <LRB> = 0, the receiver is requesting new data. When the next transmitted data is
8 bits, write the transmitted data to SBI0DBR2. When the next transmitted data is
other than 8 bits, set <BC2:0> to 1, set <ACK> to 1 and write the transmitted data to
SBI0DBR2. After the data has been written, <PIN> is set to 1, a serial clock pulse is
generated to trigger transfer of the next word of data via the SCL pin, and the word is
transmitted. After the data has been transmitted, an INTI2C2 interrupt request is
generated. <PIN> is cleared to 0 and the SCL line is pulled low. If the length of the
data to be transferred is greater than one word, repeat the latter steps of the procedure,
starting from the check of the <LRB> setting.
SCL line
Write to SBI0DBR2
1
2
3
4
5
6
7
8
9
SDA line
<PIN>
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Acknowledge signal
from a receive.
INTI2C2
interrupt request
Output from master
Output from slave
Figure 3.12.14 Example in which <BC2:0> = 000 and <ACK> = 1 in Transmitter Mode
91CW18A-213
2005-08-15