TC74HC237AP_07 Datasheet, PDF (2/9 Pages) Toshiba Semiconductor – 3-to-8 Line Decoder/Latch

IEC Logic Symbol
TC74HC237AP/AF
Truth Table
Inputs
Enable
Address
GL G2 G1 C
B
A
X
X
L
X
X
X
X
H
X
X
X
X
L
L
H
L
L
L
L
L
H
L
L
H
L
L
H
L
H
L
L
L
H
L
H
H
L
L
H
H
L
L
L
L
H
H
L
H
L
L
H
H
H
L
L
L
H
H
H
H
H
L
H
X
X
X
Outputs
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
Depends upon the address previously applied while GL was
at a low level
X: Don’t care
System Diagram
2
2007-10-01