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TMP91FW60FG Datasheet, PDF (184/322 Pages) Toshiba Semiconductor – 16 Bit Microcontroller | |||
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TMP91FW60
9.3.4.5 Restart
Restart is used during data transfer between a master device and a slave to change the data transfer
direction.
The following description explains how to restart when the TMP91FW60 is in Master mode.
Clear SBI0CR2<MST, TRX, BB> to â0â and set SBI0CR2<PIN> to â1â to release the bus. The SDA
line remains High and the SCL pin is released. Since a stop condition has not been generated on the bus,
other devices assume the bus to be in busy state.
And confirm SCL pin, that SCL pin is released and become bus-free state by SBI0SR<BB> = â0â or
signal level â1â of SCL pin by sensing its port (change to input mode). Check the <LRB> until it becomes
â1â to check that the SCL line on a bus is not pulled down to the low level by other devices. After con-
firming that the bus remains in a free state, generate a start condition using the procedure described in
9.3.4.2.
In order to satisfy the setup time requirements when restarting, take at least 4.7 μs of waiting time by
software from the time of restarting to confirm that the bus is free until the time to generate the start con-
dition.
76543210
SBI0CR2 â 0 0 0 1 1 0 0 0
if SBI0SR<BB> â 0
Then
if SBI0SR<LRB> â 1
Then
4.7us Wait
SBI0CR1 â 0 0 0 1 0 X X X
SBI0DBR â X X X X X X X X
SBI0CR2 â 1 1 1 1 1 0 0 0
Note: X: Donât care
Release the bus
Check if SCL pin is released.
Check if SCL pin of other device is "L" level.
Set acknowledgement mode.
Set the slave address and direction bit.
Generate start condition.
SCL pin
Internal SCL
SDA pin
<LRB>
<BB>
<PIN>
"0"Ë <MST>
"0"Ë <TRX>
"0"Ë <BB>
"1"Ë <PIN>
9
"1"Ë <MST>
"1"Ë <TRX>
"1"Ë <BB>
"1"Ë <PIN>
4.7μs (Min)
Start condition
Figure 9-15 Timing Diagram for TMP91FW60 Restart
Note: Don't write <MST> "0", when <MST> "0" condition. (Cannot be restarted)
Page 180
2007-10-15
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