TMP86CH72FG Datasheet, PDF (173/198 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86CH72FG
17.3 Control
The VFT driver circuit is controlled by the VFT control registers (VFTCR1, VFTCR2, VFTCR3). Reading VFT
status register (VFTSR) determines the VFT operating status.
Switching the mode from NORMAL1/2 to SLOW or STOP puts the VFT driver circuit into blanking state (BLK is
set to “1” ; values set in the VFT control registers except BLK is maintained), and sets segment outputs and digit out-
puts are cleared to “0”. Thus, ports P6 to P9 function as general-purpose output ports with pull-down.
VFT control register 1
VFTCR1
7
6
5
4
3
2
1
0
(002AH)
BLK
SDT1
"0"
(Initial value: 1000 0000)
BLK
VFT display control
0: Display enable
1: Disable
00
SDT1
Display time select1 (tdisp)
01
(Display time of 1 digit)
10
11
SDT2 = 0
2⁹/fc
2¹⁰/fc
2¹¹/fc
2¹²/fc
SDT2 = 1
2⁸/fc
2⁹/fc
2¹⁰/fc
2¹¹/fc
R/W
R/W
Note 1: fc: High frequency clock [Hz]
Note 2: It is necessary to set diplay blanking staus by setting VFTCR1<BLK> to "1", when you would like to change display
time(SDT1) on VFT display operation. At the same time, please make sure not to modify SDT1.
Note 3: Reserved: Can not access.
VFTSR
7
6
5
4
3
2
1
0
(002DH)
WAIT
(Initial value: 1000 0000)
WAIT
0: VFT display in operation
VFT operational status monitor
1: VFT display operation disabled
Read
only
Note 1: VFTSR<WAIT> is initialized to 1 after resetting.
Note 2: When VFTCR1<BLK> is cleared to 0, WAIT flag is cleared to 0 at an end of display timing. And a VFT driving circuit is
enabled at an end of next display timing.
Note 3: During a VFT driving circuit is enabled, it is disabled just after an end of display timing (tdisp) by setting VFTCR1<BLK> to
1. And WAIT flag is set to 1 simultaneously.
Note 4: When a VFT driving circuit is enabled again, it is necessary that VFTCR1<BLK> is set to 1 after confirming
VFTSR<WAIT> is 1.
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