TMP86FH09ANG Datasheet, PDF (144/200 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

13. Key-on Wakeup (KWU)
13.2 Control
TMP86FH09ANG
13.2 Control
The P34 to P37 (STOP2 to STOP5) pins can individually be disabled/enabled using Key-on Wakeup Control Reg-
ister (STOPCR). Before these pins can be used to place the device out of STOP mode, they must be set for input
using the P3 Port Input/Output Register (P3CR), P3Port Output Latch (P3DR), AD Control Register (ADCCR1).
STOP mode can be entered by setting up the System Control Register (SYSCR1), and can be released by detecting
the active edge (rising or falling edge) on any STOP2 to STOP5 pins which are available for STOP mode release.
Note: When using Key-on Wakeup function, select level mode ( set SYSCR1<RELM> to "1" ) for selection of STOP
mode release method.
Although P20 pin is shared with INT5 and STOP pin input, use mainly STOP pin to release STOP mode. This is
because Key-on Wakeup function is comprised of STOP pin and STOP2 to STOP5 pins as shown in the configuration
diagram.
Note 1: When STOP mode release by an edge on STOP pin, follow one of the two methods described below.
(1) Disable all of STOP2 to 5 pin inputs.
(2) Fix STOP2 to 5 pin inputs high or low level.
Note 2: When using key-on wakeup (STOP2 to 5 pins) to exit STOP mode, make sure STOP pin is held low and STOP2 to
5 pin inputs are held high or low level, because STOP mode release signal is created by ORing the STOP pin
input and the STOP2 to 5 pin input together.
Key-on Wakeup STOP Mode Control Register
STOPCR
7
6
5
4
3
2
1
0
(0031H) STOP5 STOP4 STOP3 STOP2
(Initial value : 0000 ****)
STOP2 STOP mode release by P34 (STOP2)
STOP3 STOP mode release by P35 (STOP3)
STOP4 STOP mode release by P36 (STOP4)
STOP5 STOP mode release by P37 (STOP5)
0:
Disable
1:
Enable
0:
Disable
1:
Enable
0:
Disable
1:
Enable
0:
Disable
1:
Enable
Write
only
<Example of STOP mode release>
The device is released from STOP mode in the following condition.
P20(STOP)
STOP mode release using P3x (STOP2 to 5)
Level detection mode: Low
Edge detection mode: Disable
STOP mode release using P20 (STOP)
Level detection mode: High
Edge detection mode: Rising edge
P3x
Edge detection
Rising or falling edge
STOPCR: inhibited
Note: Assertion of the STOP mode release signal is not recognized within three instruction cycles after executing the STOP
instruction.
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