TA1383AFG Datasheet, PDF (14/47 Pages) Toshiba Semiconductor – NTSC Chroma Decoder, Multi-Point Scan Sync Processor, H/V Frequency Counter IC for Color TV

TA1383AFG
How To Start I²C Bus
After power on, TA1383FG pins 28 and 29 (Cr/Pr/R IN, Cb/Pb/B IN) are in Full-Field Clamp Mode.
Full-Field Clamp Mode is released by writing or reading. And then, clamp is performed only during the
clamp pulse period.
Described below is how to send bus data after power on. Use software to handle the procedure.
1. Turn power on.
2. Transmit all write data.
How To Transmit/Receive Via I²C Bus
Slave Address: Can Be Changed Using Pin 12. (V_CC1 = 9 V, V_CC2 = 5 V)
Pin 12-GND (GND to 1.2 V): D8H/D9H
Pin 12-3 V (1.8 to 4.2 V): DAH/DBH
A6 A5 A4 A3 A2 A1 A0 W/R
1
1
0
1
1
0
0
0/1
A6 A5 A4 A3 A2 A1 A0 W/R
1
1
0
1
1
0
1
0/1
Pin 12-6 V (4.8 to 7.2 V): DCH/DDH
A6 A5 A4 A3 A2 A1 A0 W/R
1
1
0
1
1
1
0
0/1
Pin 12-V_CC1 (7.8 to V_CC1) DEH/DFH
A6 A5 A4 A3 A2 A1 A0 W/R
1
1
0
1
1
1
1
0/1
Start and Stop Conditions
SDA
SCL
S
Start condition
Bit Transmission
P
Stop condition
SDA
SCL
Acknowledgement
SDA must not be changed SDA may be changed
SDA from
transmitter
SDA from receiver
SCL from master
1
S
High impedance at bit 9
Low impedance at bit
9 only
8
9
Clock pulse for acknowledgement
14
2005-09-05