TC55VCM208ASTN40 Datasheet, PDF (10/12 Pages) Toshiba Semiconductor – 524,288-WORD BY 8-BIT FULL CMOS STATIC RAM

TC55VCM208ASTN40,55
Note:
(1)
(2)
(3)
In CE1 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V or
CE2 ≥ V_DD − 0.2 V.
When CE1 is operating at the V_IH(min.) level, the operating current is given by I_DDS1 during the
transition of V_DD from 2.3(2.7) to 2.2V(2.4 V).
In CE2 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V.
2003-08-11 10/12