TC74VHC139F_07 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – Dual 2-to-4 Line Decoder

TC74VHC139F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC139F,TC74VHC139FN,TC74VHC139FT
Dual 2-to-4 Line Decoder
The TC74VHC139 is an advanced high speed CMOS 2 to 4
LINE DECODER/DEMULTIPLEXER fabricated with silicon
gate C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The active low enable input can be used for gating or it can be
used as a data input for demultiplexing applications.
When the enable input is held High, all four outputs are fixed
at a high logic level independent of the other inputs.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
• High speed: t_pd = 5.0 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_{CC (min)}
• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_{CC (opr)} = 2 V to 5.5 V
• Pin and function compatible with 74ALS139
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC139F
TC74VHC139FN
TC74VHC139FT
1G 1
1A 2
1B ³
1Y0 4
1Y1 5
1Y2 6
1Y3 7
GND 8
(top view)
16 VCC
15 2G
14 2A
13 2B
12 2Y0
11 2Y1
10 2Y2
9 2Y3
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
1
2007-10-01