TC74HC4017AP_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic Decade Counter/Divider

TC74HC4017AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC4017AP,TC74HC4017AF
Decade Counter/Divider
The TC74HC4017A is a high speed CMOS DECADE
JOHNSON COUNTER fabricated with silicon gate C²MOS
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaing the CMOS low power dissipation.
It contains 5-stage divided-by-10 Johnson counter with 10
decoded output (Q0-Q9) and carry-out bit.
This counter is advanced on the positive edge of clock signal
when clock enable signal ( CE ) input is held low, or it is advanced
on the negative edge of the CE when CK input is held high, and
selected one of ten outputs goes high. Holding high the CLR
input, this counter is cleared to its zero state without regard to
the other input conditions.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: f_max = 87 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Outputs drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2~6 V
• Pin and function compatible with 4017B
Pin Assignment
TC74HC4017AP
TC74HC4017AF
Weight
DlP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
1
2007-10-01