TC74AC245P_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC245,640P/F/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC245P,TC74AC245F,TC74AC245FT
TC74AC640P,TC74AC640F,TC74AC640FT
Octal Bus Transceiver
TC74AC245P/F/FT 3-State, Non-Inverting
TC74AC640P/F/FT 3-State, Inverting
TC74AC245P, TC74AC640P
The TC74AC245, 640 are advanced high speed CMOS OCTAL
BUS TRANSCEIVERs fabricated with silicon gate and double-layer
metal wiring C²MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
They are intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input ( G ) can be used to disable the device so that
the busses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74AC245F, TC74AC640F
Features (Note 1)(Note 2)
• High speed: t_pd = 3.9 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 8 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Symmetrical output impedance:
|I_OH| = I_OL = 24 mA (min)
Capability of driving 50 Ω transmission lines.
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 V to 5.5 V
• Pin and function compatible with 74F245/640
Note 1: Do not apply a signal to any bus terminal when it is in
the output mode. Damage may result.
TC74AC245FT, TC74AC640FT
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.08 g (typ.)
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
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2007-10-01