TC58FVT641 Datasheet, PDF (1/53 Pages) Toshiba Semiconductor – 64-MBIT (8M × 8 BITS / 4M × 16 BITS) CMOS FLASH MEMORY

TC58FVT641/B641FT/XB-70,-10
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
64-MBIT (8M × 8 BITS / 4M × 16 BITS) CMOS FLASH MEMORY
DESCRIPTION
The TC58FVT641/B641 is a 67,108,864-bit, 3.0-V read-only electrically erasable and programmable flash memory
organized as 8,388,608 words × 8 bits or as 4,194,304 words × 16 bits. The TC58FVT641/B641 features commands
for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based
on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The
TC58FVT641/B641 also features a Simultaneous Read/Write operation so that data can be read during a Write or
Erase operation.
FEATURES
• Power supply voltage
• Block erase architecture
VDD = 2.7 V~3.6 V
• Operating temperature
Ta = −40°C~85°C
• Organization
8M × 8 bits / 4M × 16 bits
• Functions
Simultaneous Read/Write
Auto Program, Auto Erase
8 × 8 Kbytes / 127 × 64 Kbytes
• Boot block architecture
TC58FVT641FT/XB: top boot block
TC58FVB641FT/XB: bottom boot block
• Mode control
Compatible with JEDEC standard commands
• Erase/Program cycles
10⁵ cycles typ.
Fast Program Mode / Acceleration Mode
• Access time
Program Suspend/Resume
70 ns (CL: 30 pF)
Erase Suspend/Resume
data polling / Toggle bit
block protection, boot block protection
Automatic Sleep, support for hidden ROM area
common flash memory interface (CFI)
Byte/Word Modes
•
•
100 ns (CL: 100 pF)
Power consumption
10 µA (Standby)
30 mA (Read operation)
15 mA (Program/Erase operations)
Package
TSOPI48-P-1220-0.50 (weight: 0.52 g)
P-TFBGA63-0911-0.80AZ (Weight: TBD)
000707EBA1
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