SM320C6424-EP Datasheet, PDF (97/236 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

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SM320C6424-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS580 – JUNE 2009
As discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, PCI pins span across the
following Pin Mux Blocks: Host Block, EMIFA Block Sub-Block 0 and Sub-Block 3, PCI Data Block, and
GPIO Block. For proper PCI operation, PCI must be selected in all of these Pin Mux Blocks.
There is only one EMAC peripheral on the C6424 device, even though the pins for MII mode and the pins
for RMII modes are brought out to different locations. The EMAC MII mode pins are in the Host Block,
while EMAC RMII mode pins are only in the EMIFA Block. The user is only allowed to select either the MII
pins or the RMII pins. The operation is undefined if the user attempts to select both MII pins and RMII
pins.
Table 3-21 provides a different view of the Host Block pin muxing, showing the Host Block function based
on PINMUX1 settings. The selection options are also shown pictorially in Figure 3-10.
If EMAC operation is desired, EMAC must be placed in reset before programming PINMUX1.HOSTBK to
select EMAC pins.
PINMUX1 SETTING
PCIEN⁽¹⁾ HOSTBK
1
000
1
001 to 111
0
000
0
001
0
010
0
011
Table 3-21. Host Block Function Selection
BLOCK FUNCTION
RESULTING PIN FUNCTIONS
PCI
(Default if PCIEN = 1)
Reserved
GPIO (27)
(Default if PCIEN = 0)
PCI: PCICLK, PCBE2, PCBE1, PCBE0, PFRAME, PIDRDY, PTRDY,
PDEVSEL, PSTOP, PPER, PSERR, PPAR, AD[18:05], AD[03]
Internal pullup/pulldown on all these pins are disabled.
Reserved
GPIO: GP[83:57]
HPI + GPIO (1)
VLYNQ + GPIO (17)
HPI: HHWIL, HCNTL[1:0], HR/W, HDS2, HDS1, HRDY, HCS, HINT, HAS,
HD[15:0]
GPIO: GP[57]
VLYNQ: VLYNQ_CLOCK, VLYNQ_SCRUN, VLYNQ_RXD[3:0],
VLYNQ_TXD[3:0]
GPIO: GP[83:67]
VLYNQ + EMAC (MII) + MDIO
VLYNQ: VLYNQ_CLOCK, VLYNQ_SCRUN, VLYNQ_RXD[3:0],
VLYNQ_TXD[3:0]
EMAC (MII): TXCLK, CRS, COL, TXD[3:0], RXDV, TXEN, RXER, RXCLK,
RXD[3:0]
MDIO: MDC, MDIO
If EMAC operation is desired, EMAC must be placed in reset before
programming PINMUX1.HOSTBK or PINMUX0.RMII to select EMAC
pins.
EMAC (MII): TXCLK, CRS, COL, TXD[3:0], RXDV, TXEN, RXER, RXCLK,
RXD[3:0]
MDIO: MDC, MDIO
0
100
EMAC (MII) + MDIO + GPIO (10)
GPIO: GP[66:57]
0
101 to 111
Reserved
If EMAC operation is desired, EMAC must be placed in reset before
programming PINMUX1.HOSTBK or PINMUX0.RMII to select EMAC
pins.
Reserved
(1) If PCIEN = 1, the internal pullup/pulldown on all Host Block pins are disabled. If PCIEN = 0, the internal pullup/pulldown on all Host
Block pins are enabled.
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Device Configurations
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