SM320C6424-EP Datasheet, PDF (92/236 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

SM320C6424-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS580 – JUNE 2009
www.ti.com
Table 3-19. Multiplexed Pins on C6424 (continued)
SIGNAL
NAME
RMRXD0/EM_CS4/GP[32]
REFCLK/GP[31]
RMCRSDV/GP[30]
RMTXEN/GP[29]
RMTXD0/GP[28]
RMTXD1/GP[27]
GP[26]/(FASTBOOT)
GP[25]/(BOOTMODE3)
GP[24]/(BOOTMODE2)
GP[23]/(BOOTMODE1)
GP[22]/(BOOTMODE0)
EM_D[7]/GP[21]
EM_D[6]/GP[20]
EM_D[5]/GP[19]
EM_D[4]/GP[18]
EM_D[3]/GP[17]
EM_D[2]/GP[16]
EM_D[1]/GP[15]
EM_D[0]/GP[14]
EM_CS3/GP[13]
EM_CS2/GP[12]
EM_A[3]/GP[11]
EM_A[4]/GP[10]/(PLLMS2)
EM_A[1]/(ALE)/GP[9]/(PLLMS1)
EM_A[2]/(CLE)/GP[8]/(PLLMS0)
EM_A[0]/GP[7]/(AEM2)
EM_BA[0]/GP[6]/(AEM1)
EM_BA[1]/GP[5]/(AEM0)
EM_A[12]/PCBE3/GP[89]
EM_A[11]/AD24/GP[90]
EM_A[10]/AD23/GP[91]
EM_A[9]/PIDSEL/GP[92]
EM_A[8]/AD21/GP[93]
EM_A[7]/AD22/GP[94]
EM_A[6]/AD20/GP[95]
EM_A[5]/AD19/GP[96]
VLYNQ_CLOCK/PCICLK/GP[57]
HD0/VLYNQ_SCRUN/AD18/GP[58]
HD1/VLYNQ_RXD0/AD16/GP[59]
HD2/VLYNQ_RXD1/AD17/GP[60]
HD3/VLYNQ_RXD2/PCBE2/GP[61]
HD4/VLYNQ_RXD3/PFRAME/GP[62]
HD5/VLYNQ_TXD0/PIRDY/GP[63]
HD6/VLYNQ_TXD1/PTRDY/GP[64]
HD7/VLYNQ_TXD2/PDEVSEL/GP[65]
HD8/VLYNQ_TXD3/PPERR/GP[66]
HD9/MCOL/PSTOP/GP[67]
HD10/MCRS/PSERR/GP[68]
HD11/MTXD3/PCBE1/GP[69]
GDU
NO.
H22
G22
K22
K21
J21
L19
K19
H21
L20
K20
J20
H20
F21
F22
G21
F20
E22
G20
E21
D22
C22
D21
B21
B20
A20
C21
E20
C20
B12
C12
B11
C11
A11
C10
B10
A10
A8
B9
C9
A9
B8
C8
A7
C7
B7
A6
C6
B6
A5
PINMUX DESCRIPTION
PINMUX GROUP
CONTROLLED BY PINMUX BIT FIELDS
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 1
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
EMIFA Sub-Block 3
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
Host Block
RMII, CS4SEL
RMII
RMII
RMII
RMII
RMII
-
-
-
-
-
AEM
AEM
AEM
AEM
AEM
AEM
AEM
AEM
CS3SEL
AEM
AEM
AEM
AEM
AEM
AEM
AEM
AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, AEM
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
PCIEN, HOSTBK
92
Device Configurations
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