LM3S9D92 Datasheet, PDF (969/1407 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S9D92 Microcontroller
Register 22: Ethernet PHY Management Register 4 – Auto-Negotiation
Advertisement (MR4), address 0x04
This register provides the advertised abilities of the Ethernet Controller used during auto-negotiation.
Bits 8:5 represent the Technology Ability Field bits. This field can be overwritten by software to
auto-negotiate to an alternate common technology. Writing to this register has no effect until
auto-negotiation is re-initiated by setting the RANEG bit in the MR0 register.
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4)
Base 0x4004.8000
Address 0x04
Type R/W, reset 0x01E1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NP
reserved
RF
reserved
A3
A2
A1
A0
S
Type RO
RO
R/W
RO
RO
RO
RO
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
Bit/Field
15
Name
NP
Type
RO
Reset
0
Description
Next Page
Value Description
1 The Ethernet Controller is capable of Next Page exchanges to
provide more detailed information on the PHY layer’s
capabilities.
0 The Ethernet Controller is not capable of Next Page exchanges.
14
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
13
RF
R/W
0
Remote Fault
Value Description
1 Indicates to the link partner that a Remote Fault condition has
been encountered.
0 No Remote Fault condition has been encountered.
12:9
reserved
RO
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
8
A3
R/W
1
Technology Ability Field [3]
Value Description
1 The Ethernet Controller supports the 100Base-TX full-duplex
signaling protocol. If software wants to ensure that this mode
is not used, this bit can be cleared and auto-negotiation
re-initiated with the RANEG bit in the MR0 register.
0 The Ethernet Controller does not support the 100Base-TX
full-duplex signaling protocol.
January 22, 2012
969
Texas Instruments-Production Data