TPS65381A-Q1_17 Datasheet, PDF (95/120 Pages) Texas Instruments – Multirail Power Supply for Microcontrollers in Safety-Relevant Applications

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TPS65381A-Q1
SLVSDJ1A – JULY 2016 – REVISED MAY 2017
Battery Supply voltage
(must be reverse protected and
may need to be filtered for EMC)
10 µF
(50 V)
100 nF
(50 V)
100 nF
(50 V)
10 nF
(50 V)
To MCU Reset input
To MCU GPIO input for
observing digital signals
To MCU ADC input for
observing analog signals
To
MCU
SPI
RRSTEXT(3)
22 k
ERROR input signal or
Watchdog trigger signal from MCU
Wake-up from CAN transceiver
VDD6 or Battery Supply voltage²
(must be reverse protected)
100 nF
(50 v)
1 VBAT_SAFING
ENDRV 32
2 VCP
SEL_VDD3/5 31
3 CP1
IGN 30
4 CP2
VBATP 29
5 PGND
SDN6 28
66 ^NRES
VDD6 27
7 DIAG_OUT
VDD1_G 26
88 NCS
TPS65381-Q1
TPS65381A-Q1
PGND 25
99 SDI
VDD1_SENSE 24
10 SDO
GND 23
11 SCLK
VDDIO 22
12 RSTEXT
VDD3/5 21
13 ERROR/WDI
VDD5 20
14 CANWU
GND 19
15 VSFB1
VTRACK1 18
16 VSIN
VSOUT1 17
100 nF
(50 V)
Enable output signal for for External Power
Stages or Peripheral Wake-Up
Open for VDD3/5 = 3.3 V
GND for VDD3/5 = 5 V
0.1 µF
IGNITION Input signal
VDD6: Preregulated Supply
L1 = 33 µH
0.01 µF
D1
22 µF
ESR
Q1
22 µF
100 k
43.2 ⁽¹⁾
VDD1: MCU
CORE Supply
22 µF
VDD5 or
VDD3/5
100 nF
80.6
VDD3: MCU IO Supply
4.7 µF
VDD5: CAN Tranceiver Supply
4.7 µF
GND or any reference voltage
(for instance VDD5 or VDD3/5)⁽²⁾
RVSFB2(2) ^{4.7 µF}
(50 V)
RVSFB1(2)
Example components:
Copyright © 2017, Texas Instruments Incorporated
• Q1: BUK9213-30A
• D1: Vishay SS3H09/10, OnSemi MBRS340T3
• D2: ROHM UDZSTE-176.2B
• L1: TDK CLF10060NIT-330M-D or COILCRAFT MSS1246T-333ML
NOTE:
1. 43.2 Ω for 1.23-V output voltage (Recommended for TI TMS570 MCU). Change this resistor to obtain different VDD1 output voltage, VDD1_SENSE = 800 mV. The
tolerance of the resistors in this resistor divider will impact VDD1 regulation and voltage monitoring tolerance. Resistors with 0.1% tolerance are recommended.
2. R_VSFB1 and R_VSFB2 configure the VSOUT1 voltage
– Pin 16 (VSIN) to be connected either to pin 27 (VDD6) for VSOUT1 ≤ 5 V or to pin 29 (VBATP) for 5 V < VSOUT1 < 9.5 V
– Pin 18 (VTRACK1) to be connected to GND for non-tracking mode, or a reference voltage (for example VDD5 or VDD3/5) for tracking mode.
– The tolerance of the resistors in this resistor divider will impact VSOUT1 regulation and voltage monitoring tolerance. Resistors with 0.1% tolerance are
recommended.
– See Section 5.3.5 for details.
3. R_RSEXT configures the Reset Extension time. See the Reset and Enable outputs section of Section 4.5
Figure 6-1. Typical Application Diagram
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Application and Implementation
95