TMS320LF2407_13 Datasheet, PDF (94/117 Pages) Texas Instruments – DSP CONTROLLERS

TMS320LF2407,TMS320LF2406, TMS320LF2402
DSP CONTROLLERS
SPRS094I − APRIL 1999 − REVISED SEPTEMBER 2003
external memory interface ready-on-write timings (continued)
timing requirements for an external memory interface ready-on-write with one software wait state
and one external wait state (see Figure 44)
th(RDY)
tsu(RDY)
td(COH−A)W
Hold time, READY after CLKOUT high
Setup time, READY before CLKOUT high
Delay time, CLKOUT high to address valid
MIN MAX UNIT
14
ns
7
ns
10 ns
SW = 1 cycle
EXW = 1 cycle
Write Cycle
CLKOUT
PS, DS, IS
A[0:15]
READY
R/W
WE
td(COH−A)W
tsu(RDY)COH
th(RDY)COH
D[0:15]
STRB
Figure 44. Ready-on-Write Timings With One Software Wait (SW) State and
One External Wait (EXW) State
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