TMS320DM6467_17 Datasheet, PDF (92/355 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467
SPRS403H – DECEMBER 2007 – REVISED JUNE 2012
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4.3.2.2 TSIF Control
The TSIF Control (TSIFCTL) registers allows the user to select/control the clock muxing for the counter
and serial output of TSIF1 andthe counter and parallel/serial output for TSIF0.
31
RESERVED
R-0000 0000 0000 0000
15
14
12
11
8
RSV
TSIF1_CNTCLK
TSSO_CLK
R-0
R/W-000
R/W-0000
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
7
RSV
R-0
6
4
TSIF0_CNTCLK
R/W-000
Figure 4-3. TSIFCTL Register [0x01C4 0050]
3
RSV
R-0
16
2
0
TSPO_CLK
R/W-000
BIT
31:15
14:12
11:8
7
6:4
3
2:0
Table 4-5. TSIFCTL Register Bit Descriptions
NAME
RESERVED
TSIF1_CNTCLK
TSSO_CLK
RSV
TSIF0_CNTCLK
RSV
TSPO_CLK
DESCRIPTION
Reserved. Read returns "0".
TSIF1 Counter Clock Source.
This field selects the clock source for the TSIF1 module's counter.
000 = CRG1_VCXI (external pin)
001 = STC_CLKIN (external pin)
010 = AUXCLK (PLLC1 output – 27 MHz)
011 = CRG0_VCXI (external pin)
100 = VP_CLKIN2 (external pin)
101 = VP_CLKIN3 (external pin)
110 = Reserved
111 = Reserved
TSIF1 Serial Output Clock Source.
This field selects the clock source for the TSIF1 output source clock.
0000 = CRG1_VCXI (external pin)
0001 = STC_CLKIN (external pin)
0010 = SYSCLK6 (PLLC1)
0011 = SYSCLKBP (PLLC1)
0100 = VP_CLKIN0 (external pin)
0101 = TS1_CLKIN (external pin)
0110 = VP_CLKIN2 (external pin)
0111 = Reserved
1000 = CRG0_VCXI
1001 = Reserved
1xx1 = Reserved
Reserved. Read returns "0".
TSIF0 Counter Clock Source.
This field selects the clock source for the TSIF0 module's counter.
000 = CRG0_VCXI (external pin)
001 = STC_CLKIN (external pin)
010 = AUXCLK (PLLC1 output – 27 MHz)
011 = CRG1_VCXI (external pin)
100 = VP_CLKIN0 (external pin)
101 = VP_CLKIN1 (external pin)
110 = Reserved
111 = Reserved
Reserved. Read returns "0".
TSIF0 Parallel/Serial Output Clock Source.
This field selects the clock source for the TSIF0 output source clock.
000 = CRG0_VCXI (external pin)
001 = STC_CLKIN (external pin)
010 = SYSCLK5 (PLLC1)
011 = SYSCLKBP (PLLC1)
100 = VP_CLKIN0 (external pin)
101 = VP_CLKIN1 (external pin)
110 = TS0_CLKIN (external pin)
111 = CRG1_VCXI (external pin)
92
Device Configurations
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