TPS43335-Q1_15 Datasheet, PDF (9/43 Pages) Texas Instruments – Single-Boost, Dual Synchronous-Buck Controller

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DC Electrical Characteristics (continued)
V_IN = 8 V to 18 V, T_J = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
BOOST CONTROLLER
V_boost7V
Boost V_OUT = 7 V
Boost-enable threshold
V_boost7V-th
Boost-disable threshold
Boost hysteresis
V_boost10V
Boost V_OUT = 10 V
Boost-enable threshold
V_boost10V-th
Boost-disable threshold
Boost hysteresis
V_boost11V
Boost V_OUT = 11 V
Boost-enable threshold
V_boost11V-th
Boost-disable threshold
Boost hysteresis
BOOST-SWITCH CURRENT LIMIT
DIV = low, V_BAT = 2 V to 7 V
Boost V_OUT = 7 V, V_BAT falling
Boost V_OUT = 7 V, V_BAT rising
Boost V_OUT = 7 V, V_BAT rising or falling
DIV = open, V_BAT = 2 V to 10 V
Boost V_OUT = 10 V, V_BAT falling
Boost V_OUT = 10 V, V_BAT rising
Boost V_OUT = 10 V, V_BAT rising or falling
DIV = V_REG, V_BAT = 2 V to 11 V
Boost V_OUT = 11 V, V_BAT falling
Boost V_OUT = 11 V, V_BAT rising
Boost V_OUT = 11 V, V_BAT rising or falling
V_DS
Current-limit sensing
t_DS
Leading-edge blanking
GATE DRIVER FOR BOOST CONTROLLER
DS input with respect to PGNDA
I_{GC1 Peak}
Gate-driver peak current
r_DS(on)
Source and sink driver
GATE DRIVER FOR PMOS
V_REG = 5.8 V, I_GC1 current = 200 mA
r_DS(on)
PMOS OFF
I_{PMOS_ON}
Gate current
t_{delay_ON}
Turnon delay
BOOST-CONTROLLER SWITCHING FREQUENCY
V_IN = 13.5 V, V_GS = –5 V
C = 10 nF
f_sw-Boost
Boost switching frequency
D_Boost
Boost duty cycle
ERROR AMPLIFIER (OTA) FOR BOOST CONVERTERS
Gm_BOOST
Forward transconductance
BUCK CONTROLLERS
V_BAT = 12 V
V_BAT = 5 V
V_BuckA or V_BuckB Adjustable output-voltage range
V_{ref, NRM}
Internal reference and tolerance
voltage in normal mode
Measure FBX pin
V_{ref, LPM}
Internal reference and tolerance
voltage in low-power mode
Measure FBX pin
V_sense
V_I-Foldback
t_dead
DC_NRM
DC_LPM
I_{LPM_Entry}
I_{LPM_Exit}
V sense for forward-current limit in
CCM
V sense for reverse-current limit in
CCM
V sense for output short
Shoot-through delay, blanking time
High-side minimum on-time
Maximum duty cycle (digitally
controlled)
Duty cycle, LPM
LPM entry-threshold load current as
fraction of maximum set load current
LPM exit-threshold load current as
fraction of maximum set load current
FBx = 0.75 V (low duty cycle)
FBx = 1 V
FBx = 0 V
(3) The exit threshold specification is to be always higher than the entry threshold.
TPS43335-Q1, TPS43336-Q1
SLVSAV6E – JUNE 2011 – REVISED DECEMBER 2015
MIN
TYP
MAX UNIT
6.8
7
7.3
V
7.5
8
8.5
8
8.5
9
V
0.4
0.5
0.6
9.7
10
10.4
V
10.5
11
11.5
11
11.5
12
V
0.4
0.5
0.6
10.7
11
11.4
V
11.5
12
12.5
12
12.5
13
V
0.4
0.5
0.6
0.175
0.2
0.225
V
200
ns
1.5
A
2
Ω
10
20
Ω
10
mA
5
10 µs
f_{SW_Buck} / 2
kHz
90%
0.8
1.35
mS
0.35
0.65
0.9
0.792
–1%
0.784
–2%
60
0.800
0.800
75
11
V
0.808
V
1%
0.816
V
2%
90 mV
–65 –37.5
–23 mV
17
32.5
20
100
48 mV
ns
ns
98.75%
80%
1%
See ⁽³⁾
See ⁽³⁾
10%
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