TPS43335-Q1_15 Datasheet, PDF (6/43 Pages) Texas Instruments – Single-Boost, Dual Synchronous-Buck Controller

TPS43335-Q1, TPS43336-Q1
SLVSAV6E – JUNE 2011 – REVISED DECEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
See ⁽¹⁾
Voltage
Voltage
(buck function:
BuckA and BuckB)
Voltage (boost function)
Voltage (PMOS driver)
Voltage
Temperature
Input voltage: VIN, VBAT
Ground: PGNDA–AGND, PGNDB–AGND
Enable inputs: ENA, ENB
Bootstrap inputs: CBA, CBB
Bootstrap inputs: CBA–PHA, CBB–PHB
Phase inputs: PHA, PHB
Phase inputs: PHA, PHB (for 150 ns)
Feedback inputs: FBA, FBB
Error amplifier outputs: COMPA, COMPB
High-side MOSFET driver: GA1–PHA, GB1–PHB
Low-side MOSFET drivers: GA2–PGNDA, GB2–PGNDB
Current-sense voltage: SA1, SA2, SB1, SB2
Soft start: SSA, SSB
Power-good output: PGA, PGB
Power-good delay: DLYAB
Switching-frequency timing resistor: RT
SYNC, EXTSUP
Low-side MOSFET driver: GC1–PGNDA
Error-amplifier output: COMPC
Enable input: ENC
Current-limit sense: DS
Output-voltage select: DIV
P-channel MOSFET driver: GC2
P-channel MOSFET driver: VIN–GC2
Gate-driver supply: VREG
Junction temperature, T_J
Operating temperature, T_A
Storage temperature, T_stg
MIN
MAX
UNIT
–0.3
60
V
–0.3
0.3
–0.3
60
–0.3
68
–0.3
8.8
–0.7
60
–1
60
–0.3
13
–0.3
13
V
–0.3
8.8
–0.3
8.8
–0.3
13
–0.3
13
–0.3
13
–0.3
13
–0.3
13
–0.3
13
–0.3
8.8
–0.3
13
–0.3
13
V
–0.3
60
–0.3
8.8
–0.3
60
V
–0.3
8.8
–0.3
8.8
V
–40
150
–40
125
°C
–55
165
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per AEC Q100-002⁽¹⁾
Charged-device model (CDM),
per AEC Q100-011
FBA, FBB, RT, DLYAB
VBAT, ENC, SYNC, VIN
All other pins
Machine model (MM)
PGA, PGB
All other pins
VALUE
±2000
±400
±750
±500
±150
±200
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
UNIT
V
6
Submit Documentation Feedback
Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: TPS43335-Q1 TPS43336-Q1