TI380C60 Datasheet, PDF (9/15 Pages) Texas Instruments – CMOS TOKEN-RING INTERFACE DEVICE

TI380C60
CMOS TOKENĆRING INTERFACE DEVICE
SPWS015B − APRIL 1995 − REVISED OCTOBER 1996
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
TTL input and output pins (see Note 6)
PARAMETER
TEST
CONDITIONS ^†
MIN TYP
IIH
High-level input current
VI = VDD
− 20
IIL
Low-level input current
VI = OV (PWRDN = High) − 100
VOH
High-level output voltage
IOH = − 0.2 mA
2.6
VOL
Low-level output voltage
IOL = 2 mA
IOZH
Off-state output current with high-level voltage applied
VO = 2.7 V
− 20
IOZL
Off-state output current with low-level voltage applied
VO = 0.4 V
− 20
Normal mode
120
IDD
Supply current
Power-down mode
VDD = MAX
10
† _{For conditions shown as MIN / MAX, use the appropriate value specified under recommended operating conditions.}
NOTE 6: The TTL input and TTL output pins are identified in the pin functions table.
MAX
20
− 20
0.45
20
20
UNIT
µA
µA
V
V
µA
µA
mA
mA
receiver input (RCV+ and RCV−)
PARAMETER
VT+
Rising input threshold voltage
VT−
Falling input threshold voltage
VAT
Asymmetry threshold voltage, (VT+ + VT _−) B 2
TEST CONDITIONS
VICM = VSB, See Notes 8 and 9,
and Figure 6
VICM = VSB, See Notes 8 and 9,
and Figure 6
VICM = VSB, See Notes 8 and 9,
and Figure 6
MIN MAX UNIT
50 mV
− 50
mV
− 15
15 mV
VCM+
VCM−
Rising input common-mode rejection
[VT+ (@VSB + 0.5 V) − VT+ (@VSB − 0.5 V)]
Falling input common-mode rejection
[VT− (@VSB + 0.5 V) − VT− (@VSB − 0.5 V)]
See Notes 8 and 9, and Figure 6
See Notes 8 and 9, and Figure 6
Both inputs at VSB,
See Note 8 and Figure 6
− 30
30 mV
− 30
30 mV
− 10
10
II(RCV) Receiver input current
Input under test at VSB + 1 V,
Other input at VSB − 1 V,
See Note 8 and Figure 6
10
60 _µA
Input under test at VSB − 1 V,
Other input at VSB + 1 V,
See Note 8 and Figure 6
−10 −60
IEQB
Equalizer bias current
RCV+ at 4 V, RCV− at 1 V or
RCV+ at 1 V, RCV− at 4 V
See Figure 4d
1 2.2 mA
VEQW
NOTES:
Equalizer wrap voltage
WRAP = low, See Figure 4d
300 700 mV
8. VSB is the self-bias voltage of the input pair RCV+ and RCV−. It is defined as VSB = (VSB+ +VSB _−) / 2 (where VSB+ is the self-bias
voltage of RCV+; VSB _− is the self-bias voltage of RCV−). The self-bias voltage of both pins is approximately VDD / 2.
9. VICM is the common-mode voltage applied to RCV+ and RCV−.
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