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TI380C60 Datasheet, PDF (3/15 Pages) Texas Instruments – CMOS TOKEN-RING INTERFACE DEVICE
TI380C60
CMOS TOKENĆRING INTERFACE DEVICE
SPWS015B − APRIL 1995 − REVISED OCTOBER 1996
Pin Functions (Continued)
PIN
NAME
NO.
I / O / E† TYPE‡
DESCRIPTION
RATER
Rate error. RATER indicates that there are transitions on RCV+ / RCV− input pair
47
O
TTL (DRVR+ / DRVR− if WRAP is asserted low) but that the transition rate is not consistent with
the ring speed selected by S4 / 16.
RCLK
Recovered clock. RCLK is the clock recovered from the token-ring received data. For
51
O
TTL 16-Mbps operations, it is a 32-MHz clock. For 4-Mbps operations, it is an 8-MHz clock.
RCV+
RCV−
38
I
D Receiver inputs. RCV+ and RCV− receive the token-ring data by way of isolation
36
I
D transformers.
RCVR
50
O
TTL
Recovered data. RCVR contains the data recovered from the token ring and should be
sampled at the rising edge of RCLK.
REDY
PLL ready. REDY is normally asserted (active) low. REDY is cleared following the assertion
12
O
TTL
of FRAQ and reasserted after the data recovery PLL has been reinitialized.
H = Received data not valid
L = Received data valid
RES
25
—
— Reserved. RES should be left unconnected.
S4 / 16
Speed switch. S4 / 16 specifies the token-ring data rate.
14
I
TTL
H = 4-Mbps data rate
L = 16-Mbps data rate
TCLK
TMS
TDI
TDO
43
I
42
45
I
I
Test ports used during the production test of the device. TCLK, TMS, TDI, and TDO should
TTL be left unconnected.
46
O
TRST
Test-port reset. TRST should be tied to ground for normal operation of the TI380C60.
44
I
TTL
H = Reserved
L = Test ports forced to an idle state
WFLT
Phantom-wire fault. WFLT provides an indication of the presence of a short or open circuit
7
O
TTL
on PHOUTA or PHOUTB.
H = No fault
L = Open or short. The dc fault condition is present in the phantom-drive lines.
WRAP
Internal wrap-mode control. WRAP allows the TI380C60 to be placed in the loopback-wrap
mode for adapter self test.
3
I
TTL
H = Normal ring operation
L = Transmit data drives the receive data. RCV+ and RCV− are ignored by the
TI380C60, and XMT+ and XMT− are both forced low.
XMT+
XMT−
18
19
E
D
Transmit differential outputs. XMT+ and XMT− provide a low-impedance differential source
for line drive by way of filtering and transformer isolation.
XT1
XT2
31
29
E
N / TTL XTAL connection. An 8-MHz crystal network can be connected here to provide a reference
N clock for the TI380C60. Alternatively, an 8-MHz TTL clock source can be connected to XT1.
VDDA1
37
—
— Positive supply voltage for receiver circuits
VDDD
2, 49
—
— Positive supply voltage for output buffers
VDDL
11, 27
—
— Positive supply voltage for internal logic
VDDA2
32
—
— Positive supply voltage for data recovery PLL
VDDO
28
—
— Positive supply voltage for XTAL oscillator
VDDP
24
—
— Positive supply voltage for phantom drive
VDDX
20
—
— Positive supply voltage for transmit output
† I = input, O = output, E = provides external-component connection to the internal circuitry for tuning
‡ TTL = TTL signal, N = non-TTL signal, D = differential drive or data
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